Abstract:
Analog and Mixed-Signal Extensions to VHDL

The goal of this tutorial is to give an in-depth understanding of the future analog and mixed-signal extensions to the VHDL language, informally called VHDL-AMS. The IEEE 1076.1 working group is existing since 1993 and it is currently in the final phase to deliver a draft language reference manual (LRM) to be balloted within the IEEE before the end of 1996. At the time this tutorial is given, all fundamental aspects of VHDL 1076.1 will be defined and most of the remaining work will consist in writing the LRM. The tutorial will first situate VHDL-AMS with respect to VHDL by giving a summary of the main design objectives. Then, the language architecture will describe the new concepts introduced and the implications on the semantic model of VHDL will be discussed. The syntax of new language elements will be illustrated through small meaningful examples. To give hints on how VHDL-AMS will be used, more complete examples that address electrical and non-electrical problems will be also discussed. Lastly, pointers to IEEE 1076.1 information will be provided.

Alain Vachoux

Alain Vachoux holds a Ph.D in Electrical Engineering from the Swiss Federal Institute of Technology of Lausanne, Switzerland. He is currently a Scientific Adjunct with the Integrated Systems Center at the same Institute. His main task is the management and the development of EDA tools, with a particular emphasis on modeling, simulation and synthesis with hardware description languages, such as VHDL. His interest in analog and mixed-signal extensions to VHDL started in 1992 when he joined the yet informal study group that became the IEEE DASC 1076.1 working group in 1993. Since that time he is involved in the 1076.1 working group as a member of the executive committee (secretary) and as co-chairman of the language design committee. Dr. Vachoux already gave several tutorials and seminars on VHDL 1076.1 during scientific conferences and industrial meetings, both in Europe and in the US.

Contact

Alain Vachoux
Swiss Federal Institute of Technology
Dept. of Electrical Engineering
Integrated Systems Center
EPFL-DE-LEG/C3i
EL-Ecublens
CH-1015 Lausanne, Switzerland
Phone: (+41) 21 693 69 84
Fax : (+41) 21 693 46 63
E-mail: alain.vachoux@leg.de.epfl.ch